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3rd IEEE International Workshop on Automated Test Equipment: ATE Vision 2020
(ATE Vision 2020 2010)

July 15, 2010
Marriott Marquis Hotel
San Francisco, USA

http://atevision.tttc-events.org

Held in conjunction with SEMICON West 2010

Workshop Begins July 15, 2010!
CALL FOR PARTICIPATION

Scope -- Workshop Registration -- Workshop Highlights -- More Information -- Committees

Scope

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As in years past, this workshop will examine where the ATE industry is heading in the near and long-term. Moore's law continues to move forward with denser, large, faster, and highly heterogeneous devices coming our way. Further complications to this situation are the challenges associated with multiple cores on a die and the 3D trends enabled by die-stacking and thru-silicon-vias.

These issues, when added to ever increasing Test complexity, Cost-of-Test and Time-to-Market pressures pose a significant challenge to the ATE industry. To meet these challenges the industry (ATE developers and End-Users together) need to innovate in areas such as: shared interconnect technology, streamlined test program generation methods, better integrated Design-for-Testability tools.

The goal of this workshop is to create an informal forum to discuss those innovations relevant to ATE developers and users. We are looking for solutions and ideas for solutions to the issues we will run into in the 2012/2013 timeframe. What do we need to do differently? What will an ATE need to look like in 2015 and 2020? Are our present technologies adequate for the future and if not what should we be doing to close the gap?

Workshop Registration
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Register NOW to attend the test industry's most important workshop dedicated to the future of test!
Workshop Registration

Become a Corporate Supporter

Workshop Highlights
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Keynote address:  Ron Leckie, CEO Infrastructure Advisors, will present "ATE Countdown," a review of where the ATE industry has been and where it is heading.

A customer panel session focused on features and capabilities needed in the ATE of the future. This panel is moderated by G. Dan Hutcheson, CEO, VLSI Research.  

Panelists:  Pete Hodakievic, AMD,   Adam Wright, Altera,  Roger Barth, Numonyx,   Muru Yogathasan, StatsChipPac,  Andy Evans, Broadcom

A vendor panel including Chief Technical Officers from  major ATE companies. This  panel is  moderated by Rick Nelson, editor in chief of Test & Measurement World and EDN magazines

Panelists:  Gary Fleeman, Advantest,  Erik Volkerink, Verigy,  Jack O'Brien, Teradyne,  Steve Wigley, LTX-Credence,  Ben Eldridge, FormFactor

Nine technical presentations, covering 3D test, the functional versus structural test dilemma, high speed I/O test, known good die test among others:

Closing the Structural/Functional Test Gap, Matthias Kamm, Cisco

Expanding test coverage at sort to reduce overall product cost, Dale Anderson, SEMICON & FormFactor

KGD Test and Challenges and solutions for TSV based devices, Marc Loranger, FormFactor

3D Test Challenges and Probing Concepts, Stojan Kanev, Cascade Microtech

Adaptive Test Today and + 20, Robert Daasch, Portland State University

Beyond pass/fail test: The EDA perspective on the role of ATE, Geir Eide, Mentor Graphics

Towards a Universal Digital Pin Architecture: From DC to 10GHz+, Mohamed Hafed, DFT Microsystems

Multi-system Architecture: A New Twist in Cost-of-Test Management, Len Van Eck, LTX-Credence

Welcome (Back) To Functional Test, Ken Lanier, Teradyne

More Information
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General information
Erik Volkerink+1-408-864-7661
erik.volkerink@verigy.com

Committees
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General Chair
E. Volkerink, Verigy


Vice General Chair
S. Davidson, Oracle


Program Chair
D. Armstrong, Advantest


Program Vice Chair
B. Brown, LTX-Credence


Panel Chair
A. Khoche, Consultant


Finance Chair and IEEE Liaison
R. Chandramouli, ARM


Sponsoring Chair
Y. Ma, Advantest


Marketing Chair
A. Gold, Advantest


Registration Chair and SEMICON Liaison
R. Kapur, Synopsys


Marketing Vice Chair
F.-F. Ferhani, Broadcom


Local Arrangements Chair
D. Acharyya, Verigy


Program Committee
R. Barth, Numonyx
P. Burlison, Inovys
K.-Y. Cho, NVIDIA
C. J. Clark, Intellitech
A. Evans, Broadcom
W. Fister, Micron
G. Fleeman, Advantest
B. Gage, Teradyne
M. Hafed, DFT Microsystems
R. Kapur, Synopsys
D. Keezer, GeorgiaTech
R. Lesnikoski, Oracle
Y. Ma, Advantest
J. Moreira, Verigy
P. Muhmenthaler, MUHMY Systems
J. Plusquellic, University of New Mexico
B. Price, NXP
M. Roos, Roos Instruments
J. Rivoir, Verigy
N. Touba, University of Texas
C.W. Wu, Tsing Hua University

For more information, visit us on the web at: http://atevision.tttc-events.org

The 3rd IEEE International Workshop on Automated Test Equipment: ATE Vision 2020 is sponsored by the Institute of Electrical and Electronics Engineers (IEEE) Computer Society's Test Technology Technical Council (TTTC).


IEEE Computer Society- Test Technology Technical Council

TTTC CHAIR
Adit D. SINGH
Auburn University - USA
Tel. +1-334-844-1847
E-mail adsingh@eng.auburn.edu

PAST CHAIR
André IVANOV
University of British Columbia - Canada
Tel. +1-604-822-6936
E-mail ivanov@ece.ubc.ca

TTTC 1ST VICE CHAIR
Michael NICOLAIDIS
TIMA Laboratory - France
Tel. +33-4-765-74696
E-mail michael.nicolaidis@imag.fr

SECRETARY
Christian LANDRAULT
LIRMM - France
Tel. +33-4-674-18524
E-mail landrault@lirmm.fr

ITC GENERAL CHAIR
Gordon W. ROBERTS
McGill University
- Canada
Tel. +1-514-398-6029
E-mail gordon.roberts@mcgill.ca

TEST WEEK COORDINATOR
Yervant ZORIAN
Virage Logic Corporation - USA
Tel. +1-510-360-8035
E-mail yervant.zorian@viragelogic.com

TUTORIALS AND EDUCATION
Dimitris GIZOPOULOS

University of Piraeus
- Greece
Tel. +30-210-414-2372
E-mail dgizop@unipi.gr

STANDARDS
Rohit KAPUR

Synopsys
, Inc. - USA
Tel. +1-650-934-1487
E-mail rkapur@synopsys.com

EUROPE
Zebo PENG
Linköping University - Sweden
Tel. +46-13-282-067/-281-000
E-mail zpe@ida.liu.se

MIDDLE EAST & AFRICA
Ibrahim HAJJ
American University of Beirut - Lebanon
Tel. +961-1-341-952
E-mail ihajj@aub.edu.lb

STANDING COMMITTEES
André IVANOV
University of British Columbia - Canada
Tel. +1-604-822-6936
E-mail ivanov@ece.ubc.ca

ELECTRONIC MEDIA
Alfredo BENSO
Politecnico di Torino - Italy
Tel. +39-011-564-7080
E-mail alfredo.benso@polito.it

 

PRESIDENT OF BOARD
Yervant ZORIAN
Virage Logic Corporation- USA
Tel. +1-510-360-8035
E-mail yervant.zorian@viragelogic.com

SENIOR PAST CHAIR
Paolo PRINETTO
Politecnico di Torino - Italy
Tel. +39-011-564-7007
E-mail Paolo.Prinetto@polito.it

TTTC 2ND VICE CHAIR
Chen-Huan CHIANG

Alcatel-Lucent
- USA
Tel. +1-973-386-6759
E-mail chenhuan@alcatel-lucent.com

FINANCE
Michael NICOLAIDIS
TIMA Laboratory - France
Tel. +33-4-765-74696
E-mail michael.nicolaidis@imag.fr

IEEE DESIGN & TEST EIC
K.T. (Tim) CHENG
University of California, Santa Barbara - USA
Tel. +1-805-893-72942
E-mail timcheng@ece.ucsb.edu

TECHNICAL MEETINGS
Chen-Huan CHIANG
Alcatel-Lucent
- USA
Tel. +1-973-386-6759
E-mail chenhuan@alcatel-lucent.com

TECHNICAL ACTIVITIES
Matteo SONZA REORDA
Politecnico di Torino - Italy
Tel.+39-011-564-7055
E-mail matteo.sonzareorda@polito.it

ASIA & PACIFIC
Kazumi HATAYAMA
STARC - Japan
Tel. +
E-mail hatayama.kazumi@starc.or.jp

LATIN AMERICA
Victor Hugo CHAMPAC
Instituto Nacional de Astrofisica - Mexico
Tel.+52-22-470-517
E-mail champac@inaoep.mx

NORTH AMERICA
William R. MANN
SW Test Workshop - USA
Tel. +1-949-645-3294
E-mail william.mann@ieee.org

COMMUNICATIONS
Cecilia METRA
Università di Bologna - Italy
Tel. +39-051-209-3038
E-mail cmetra@deis.unibo.it

INDUSTRY ADVISORY BOARD
Yervant ZORIAN
Virage Logic Corporation- USA
Tel. +1-510-360-8035
E-mail yervant.zorian@viragelogic.com


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